A compact differential voltage reference cell, which combines an original switched capacitor integrator with a digitally programmable bandgap core, is presented. The two-stage integrator maintains an always-valid output voltage while performing correlated double sampling to effectively reduce the effects of offset and flicker noise. Measurements performed on a prototype designed with the UMC 0.18 um CMOS process showed a ±0.4 % untrimmed output voltage spread, 1 Hz flicker noise corner and output current capability