Julio Sahuquillo - UPV (Universidad Politécnica de Valencia) - Valencia, Spain - "Exploiting computer architecture issues to improve performance and fairness in commercial multicores", 9-12 July 2018

20 hours (5 credits)

Aula Riunioni del Dipartimento di Ingegneria dell’Informazione, Via Diotisalvi, Pisa

Short Abstract:
Current multicore processors implement shared resources like the last level cache (LLC) or the main memory. Requests from multiple applications compete among them in the shared resources. As a consequence, inter-application interference rises and the performance of individual applications slowdown with respect to isolated execution. This problem aggravates when considering simultaneous multithreading (SMT) cores, which implement shared resources within the core, resources that are critical for performance like the caches or the register files.

Current Operating Systems do not consider, or poorly consider these interferences, yielding the system to underrated performance.

In this course, we will study where the interference can arise, how to measure it, and we will study some approaches to reduce the interference. With this aim, we will focus first on some microarchitectural issues of current processors, the main reasons why multicore processors emerged, and on multicore evaluation. Once the basics are studied, we will focus on current technologies, like Intel CAT, that allow us to mitigate the slowdown that individual application suffer and improve the overall performance. Main memory and GPU aspect will be also studied.

We will also perform some labs to reinforce the theoretical concepts studied during the course.

Course Contents in brief:

  • 1. Superscalar and multithreaded processors
  • 2. Multicore Processors, why?
  • 3. Multicore Evolution
  • 4. Performance Evaluation of Multicores
  • 5. Accounting Architectures
  • 6. Cache memories: concepts and problems and advanced topics
  • 7. Main memory - GPU

July 2018 (from 9 to 12)

Day1 - 09/07/2018 – 5 hours.
1. Superscalar and multithreaded processors
2. Multicore Processors, why?
3. Multicore Evolution

Day2 - 10/07/2018 - 5 hours.
4. Performance Evaluation of multicores
5. Accounting architecture
6. Cache memories (I): concepts and problems.

Day3 - 11/07/2018 - 5 hours
7. Cache memories (II): advanced topics from real hardware machine perspective. Cache Sharing, fairness, prefetching, and scheduling
8. Introduction to GPUs
9. Main memory controller and memory organization: concept and problem

Day4 - 12/07/2018 - 5 hours Labs.
Practical Experience