Hours:
18 hours (4 credits)

Room:
Aula Riunioni del Dipartimento di Ingegneria dell’Informazione, Via G. Caruso 16, Pisa – Ground Floor

To register to the course, click here

Short Abstract:
This series of lectures will cover High-Performance Computing (HPC) architectures and provide a systems hardware perspective. The lectures revolve around three axes: the processing elements, the memory system and the interconnection networks at the system level. The lectures will present high-performance out-of-order processors, vector processors and GPUs, high performance memory systems (e.g. HBM, HMC) and interconnection network architectures.
The course will have a 1h discussion introduced by Sergio Saponara, University of Pisa, and Vassilis Papaefstathiou, FORTH, regarding the dissemination to PhD community of the global vision of the H2020 European Processor Initiative (EPI), part of the EuroHPC JU roadmap, involving 27 European partners (including FORTH and University of Pisa)

Course Contents in brief:

• Introduction to EPI and HPC (3h)
• High-Performance Processors: Out-of-Order CPUs, Vector, GPU (6h)
• Memory Systems for HPC (4.5 h)
• Interconnection Network Architectures for HPC (4.5 h)

Schedule: