ESSCIRC 2017 - 43rd IEEE European Solid State Circuits Conference - 10.1109/ESSCIRC.2017.8094513.
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A compact differential voltage reference cell, which combines an original switched capacitor integrator with a digitally programmable bandgap core, is presented. The two-stage integrator maintains an always-valid output voltage while performing correlated double sampling to effectively reduce the effects of offset and flicker noise. Measurements performed on a prototype designed with the UMC 0.18 um CMOS process showed a ±0.4 % untrimmed output voltage spread, 1 Hz flicker noise corner and output current capability of up to 4 mA with a quiescent current consumption of 50 uA.