A time to digital converter based system, to be used for most sub-detectors in the high-flux rare-decay experiment NA62 at CERN SPS, was built as part of the NA62 fully digital trigger and data acquisition system in which the TDC Board (TDCB) and a general-purpose motherboard (TEL62) will play a fundamental role. While TDCBs, housing four High Performance Time to Digital Converters (HPTDC), measure hit times from sub-detectors, the motherboard processes and stores them in a buffer, produces trigger primitives from different detectors and extracts only data related to the lowest trigger level decision, once this is taken on the basis of the trigger primitives themselves.

The features of the TDCB board developed by the Pisa NA62 group are extensively discussed and performance data are presented in order to show its compliance with the experiment requirements.

"Keywords: {Data Acquisition, Field Programmable Gate Array, Trigger Circuits}"

"File: {http://ieeexplore.ieee.org/stamp/stamp.jsp?arnumber=7102782}"