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Prof. Michael Huebner - Brandenburg University of Technology, Germany - "Reconfigurable Hardware, Tools and Applications", 13-15 May 2019

12 hours (3 credits)

Aula Riunioni del Dipartimento di Ingegneria dell’Informazione, Via G. Caruso 16, Pisa – Ground Floor

Short Abstract:
Reconfigurable hardware enables to develop digital circuits and configure a FPGA device. The hardware itself is “reconfigurable” which means, that the circuit can be adapted, if for example a change is needed caused by a modification of the specification of a system. Modern architectures allow to modify the configuration of the chip even during run-time. This so called dynamic and partial reconfiguration opens several opportunities for run-time adaptive system. The course introduces reconfigurable hardware architectures and shows how to develop systems which have the capability to be run-time adaptive. Several applications will show the benefit of this methodology.

Course Contents in brief:

  • Traditional processor architectures
  • Hardware / Software Codesign
  • Adaptive processor systems
  • Run-time adaptation of systems


  • Monday 13 May – 14.00 -18:00
  • Tuesday 14 May – 09:00 – 13:00
  • Wednesday 15 May – 09:00 – 13:00