Abstract: This work presents a design of a driver in 65 nm TSMC technology for a custom MZM designed to withstand non-ionizing energy losses (NIEL) of up few 1016 n/cm2 and up to 500 Mrad total ionisation doses (TID). The design of the driver is optimized for a TID exceeding 500 Mrad, for a target bit rate of 10 Gbps. The driver uses a CML (Current Mode Logic) architecture. A cascode architecture is adopted in the last stage to increase the driving voltage. The driver has a 347180 m2 layout area and a 149 mW power consumption. The ASIC has been submitted to foundry in May 2018.